Semiconductor manufacturing processes have advanced dramatically over the years in terms of producing smaller and faster circuit elements such as transistors as well as interconnections between transistors. These smaller and faster circuit elements enable the design and production of chips with higher operating speeds than was possible with chips manufactured with previous generations of semiconductor manufacturing processes.
Chips with the ability to operate at high speeds have led to products that create and communicate vast amounts of data. In turn, the need to process, store, retrieve, transfer and communicate large amounts of data creates a general need for chips to operate on the data as fast as possible.
Semiconductor manufacturing processes are designed to produce chips where the electrical characteristics of the circuit elements have a nominal value. But, it is well known that in any given semiconductor manufacturing process that there is variability in each of the manufacturing steps. This variability results in a distribution of values for the various electrical characteristics of the circuit elements. Chip designers often take the distribution of values into account by designing for a set of electrical characteristics that are considered to be the worst-case. Designing in this way typically ensures that even if the variations in manufacturing produce a chip that is “slow,” the chip will still operate fast enough to meet its specifications. This design methodology also typically ensures that when the variations in the manufacturing process produce a chip that is “fast,” the chip is typically capable of operating faster than its specification requires.
That semiconductor manufacturing processes produce a distribution of parts having different operating speed capabilities is well known. Manufacturers often test newly manufactured chips not just to determine whether these chips are functional, but to further determine how fast they can operate. Functional chips that operate in different speed ranges can be sorted out during testing—a process referred to as binning—and the higher speed chips are then typically sold for a premium.
Unfortunately, as chips have become increasingly more complex, testing and binning have become more complex. Complexity in testing increases the cost of producing chips.
The figures illustrate various components, their arrangements, and interconnections. Unless expressly stated to the contrary, the figures are not necessarily drawn to scale.